NXP Semiconductors /MIMXRT1062 /SEMC /SRAMCR2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SRAMCR2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0WDS0WDH0TA0AWDH0LC0RD0CEITV0RDH

Description

SRAM control register 2

Fields

WDS

Write Data setup time (WDS+1) cycle

WDH

Write Data hold time WDH cycle

TA

Turnaround time cycle

AWDH

Address to write data hold time cycle

LC

Latency count

RD

Read cycle time

CEITV

CE# interval min time

RDH

Read cycle hold time

Links

() ()